Bradley University, Electrical and Computer Engineering, Peoria, IL 61625
In communication systems, forward error correction (FEC) codes have been widely used to battle data transmission errors caused by a noisy channel. By attaching extra bits to the message bits, a certain number of bit errors can be detected and corrected without frequent retransmission in case of failure of data decoding. Linear block codes and convolutional codes are two main classes of FEC codes. In this study, a linear block coding system is designed using MATLAB/Simulink and implemented on a Field Programmable Gate Array (FPGA). Encoding and decoding results of the FPGA implementation by using hardware description language will be compared and cross-checked with those of the encoder/decoder system simulated by MATLAB/Simulink.
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